The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a semiconductor structure including fuses that are formed during a FinFET CMOS process, which fuses can be readily tuned, while not requiring excess footprint/spacing.
In addition to transistors, resistors, capacitors, and diodes, semiconductor devices also often contain fuses. These fuses may be used for several purposes. For example, fuses may be used within semiconductor devices for purposes of introducing or deleting customized circuit elements into a semiconductor device. In addition, fuses within semiconductor devices may be used for purposes of severing a non-operative portion of the semiconductor device and replacing that non-operative portion with a redundant semiconductor device fabricated on the same semiconductor substrate. Fuses may also be used to provide direct alternative current (DAC) trimming.
It is highly desired to fabricate on-chip fuses during FinFET CMOS fabrication so as to minimize processing cost and improve system integration. Fuses that are formed during the FinFET CMOS fabrication process are referred to as FinFET fuses. Tuning the FinFET fuse size accurately to the application is highly desired. Also, saving footprint/spacing while providing desired FinFET fuses is an additional requirement. There is thus a need for providing FinFET fuses which can be easily tuned for a desired application, and which do not take up too much space.